Semiconductor Layout Engineer — Cadence & Mask Tooling

Allegro MicroSystems, LLC in Buenos Aires is seeking a Technology Layout Engineer to support semiconductor technology development. You will generate device layouts in EDA software and manage mask releases for foundry manufacturing.

The ideal candidate holds a BSEE and has at least 1 year of relevant industry experience, with a basic understanding of EDA design tools. Join Allegro to contribute to innovative semiconductor solutions.