Job Description
Elevate your career as a Senior Digital Verification Engineer with Ciena in Ottawa, focusing on cutting-edge FEC validation techniques. Collaborate with diverse teams to develop innovative verification strategies.
As a key member of Ciena's telecommunications team, you'll take charge of validating Forward Error Correction (FEC) systems. This senior role involves developing test plans, simulating functional blocks, and mentoring junior engineers. Your expertise in C/C++, System Verilog, and UVM will play a crucial role in ensuring high-quality performance of our Wavelogic modem products.
Key Responsibilities:
• Develop comprehensive verification and coverage test plans
• Simulate and validate architectural FEC functional blocks
• Create advanced testbench environments and components
• Monitor regressions and debug verification failures
• Mentor junior engineers in verification best practices
Requirements:
• At least 10 years of verification experience
• Bac...
As a key member of Ciena's telecommunications team, you'll take charge of validating Forward Error Correction (FEC) systems. This senior role involves developing test plans, simulating functional blocks, and mentoring junior engineers. Your expertise in C/C++, System Verilog, and UVM will play a crucial role in ensuring high-quality performance of our Wavelogic modem products.
Key Responsibilities:
• Develop comprehensive verification and coverage test plans
• Simulate and validate architectural FEC functional blocks
• Create advanced testbench environments and components
• Monitor regressions and debug verification failures
• Mentor junior engineers in verification best practices
Requirements:
• At least 10 years of verification experience
• Bac...