Sr. Principal Functional Verification Engineer: Applied ML
Cadence Design Systems, Inc.
Job Description
Description
:Contribute to the application of machine learning techniques aimed at streamlining traditional pre-silicon functional verification methodologies like formal verification and UVM.
Develop agentic AI solutions using LLMs and latest ML technologies to accelerate pre-silicon Design Verification process.
Employ AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the design and verification lifecycles.
Engage directly with customers to understand requirements and deliver innovative, practical verification strategies.
Collaborate effectively with machine learning and software engineering teams to validate output correctness, efficiency, and quality.
Maintain current knowledge of advancements in AI-powered hardware verification and actively participate in fostering internal knowledge growth.
Requirements:
Complete Bachelor...